Wafer- Level Packaging Symposium 2027

Wafer- Level Packaging Symposium Burlingame 2027
From February 09, 2027 until February 11, 2027
(Please double-check the dates and location on the organizer below before attending.)

Wafer-Level Packaging Symposium

Join the Leading Wafer-Level Packaging Symposium.

If you're involved in the semiconductor industry or have a keen interest in advanced packaging technologies, mark your calendars for the Wafer-Level Packaging Symposium taking place from February 17-19, 2026, at the Hyatt Regency San Francisco Airport. This is an extraordinary opportunity to immerse yourself in the latest innovations and trends that are shaping the future of wafer-level packaging and advanced manufacturing. Attending this symposium will not only allow you to hear from industry leaders but will also provide invaluable networking opportunities with experts from around the globe.

The landscape of advanced packaging technology is rapidly evolving, driven by the complexities of modern system designs that are changing performance expectations. As traditional packaging constraints are tested by expanding transistor costs and a growing need for power efficiency, this symposium serves as a platform for discussing such pertinent topics. Join fellow attendees to explore various themes including 3D device packaging and advanced testing technologies. Engaging in discussions here will sharpen your understanding of where the industry is heading and how these advancements can be leveraged in your work.

Formatting Advanced Packaging for the AI Era.


Register for entry or booths

Please register at the organizer website of Wafer- Level Packaging Symposium

Venue Map and Hotels Around

Burlingame - Hyatt Regency San Francisco Airport, California, USA