DVCon U.S. 2027
DVCon U.S. is the premier conference on the application of languages, tools, and methodologies for the design and verification of electronic systems and integrated circuits. The focus is specialized design and verification languages such as SystemVerilog, Verilog, VHDL, PSS, SystemC, and e, as well as general-purpose languages including C, C++, Python, Perl, and Tcl.
Tools and methodologies span artificial intelligence, machine learning, open-source software, hardware and architecture, testbench automation, hardware-assisted verification, hardware/software co-verification, formal verification, functional safety and security, transaction-level system design, high-level synthesis, low-power design, 3D chip designs, IP-based SoC design methods, reference flows, and mixed-signal design and verification.
Attendees are primarily designers and verification engineers of electronic systems, ASICs, and FPGAs, plus professionals involved in research, development, and application of electronic design automation (EDA) tools. Presentations are highly technical and reflect real-world experience using these languages and tools.
The 2027 edition runs March 1–4, 2027 at the Hyatt Regency Santa Clara, 5101 Great America Parkway, Santa Clara, California, United States. The proposal submission deadline for the technical program is November 1, 2026.
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Venue Map and Hotels Around
Santa Clara - Hyatt Regency Santa Clara, California, United States